front_idill/extern/fajran-npTuioClient/npapi/prcpucfg-glibc.h
author bastiena
Fri, 06 Apr 2012 10:44:54 +0200
changeset 21 e4e5f02787a1
permissions -rw-r--r--
Front IDILL : Added Communication extern named fajran-npTuioClient It contains the project generating a dll used as a browser plugin.
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/* -*- Mode: C++; tab-width: 4; indent-tabs-mode: nil; c-basic-offset: 2 -*- */
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/* ***** BEGIN LICENSE BLOCK *****
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 * Version: MPL 1.1/GPL 2.0/LGPL 2.1
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 *
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 * The contents of this file are subject to the Mozilla Public License Version
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 * 1.1 (the "License"); you may not use this file except in compliance with
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 * the License. You may obtain a copy of the License at
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 * http://www.mozilla.org/MPL/
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 *
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 * Software distributed under the License is distributed on an "AS IS" basis,
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 * WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License
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 * for the specific language governing rights and limitations under the
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 * License.
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 *
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 * The Original Code is the Netscape Portable Runtime (NSPR).
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 *
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 * The Initial Developer of the Original Code is
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 * Netscape Communications Corporation.
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 * Portions created by the Initial Developer are Copyright (C) 1998-2000
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 * the Initial Developer. All Rights Reserved.
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 *
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 * Contributor(s):
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 *
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 * Alternatively, the contents of this file may be used under the terms of
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 * either the GNU General Public License Version 2 or later (the "GPL"), or
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 * the GNU Lesser General Public License Version 2.1 or later (the "LGPL"),
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 * in which case the provisions of the GPL or the LGPL are applicable instead
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 * of those above. If you wish to allow use of your version of this file only
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 * under the terms of either the GPL or the LGPL, and not to allow others to
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 * use your version of this file under the terms of the MPL, indicate your
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 * decision by deleting the provisions above and replace them with the notice
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 * and other provisions required by the GPL or the LGPL. If you do not delete
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 * the provisions above, a recipient may use your version of this file under
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 * the terms of any one of the MPL, the GPL or the LGPL.
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 *
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 * ***** END LICENSE BLOCK ***** */
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/*
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 * This file is used by not only Linux but also other glibc systems
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 * such as GNU/Hurd and GNU/k*BSD.
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 */
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#ifndef nspr_cpucfg___
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#define nspr_cpucfg___
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#ifndef XP_UNIX
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#define XP_UNIX
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#endif
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#if !defined(LINUX) && defined(__linux__)
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#define LINUX
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#endif
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#ifdef __FreeBSD_kernel__
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#define PR_AF_INET6 28  /* same as AF_INET6 */
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#else
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#define PR_AF_INET6 10  /* same as AF_INET6 */
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#endif
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#ifdef __powerpc64__
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#undef  IS_LITTLE_ENDIAN
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#define IS_BIG_ENDIAN    1
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#define IS_64
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#define PR_BYTES_PER_BYTE   1
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#define PR_BYTES_PER_SHORT  2
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#define PR_BYTES_PER_INT    4
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#define PR_BYTES_PER_INT64  8
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#define PR_BYTES_PER_LONG   8
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#define PR_BYTES_PER_FLOAT  4
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#define PR_BYTES_PER_DOUBLE 8
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#define PR_BYTES_PER_WORD   8
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#define PR_BYTES_PER_DWORD  8
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#define PR_BITS_PER_BYTE    8
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#define PR_BITS_PER_SHORT   16
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#define PR_BITS_PER_INT     32
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#define PR_BITS_PER_INT64   64
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#define PR_BITS_PER_LONG    64
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#define PR_BITS_PER_FLOAT   32
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#define PR_BITS_PER_DOUBLE  64
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#define PR_BITS_PER_WORD    64
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#define PR_BITS_PER_BYTE_LOG2   3
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#define PR_BITS_PER_SHORT_LOG2  4
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#define PR_BITS_PER_INT_LOG2    5
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#define PR_BITS_PER_INT64_LOG2  6
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#define PR_BITS_PER_LONG_LOG2   6
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#define PR_BITS_PER_FLOAT_LOG2  5
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#define PR_BITS_PER_DOUBLE_LOG2 6
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#define PR_BITS_PER_WORD_LOG2   6
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#define PR_ALIGN_OF_SHORT   2
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#define PR_ALIGN_OF_INT     4
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#define PR_ALIGN_OF_LONG    8
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#define PR_ALIGN_OF_INT64   8
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#define PR_ALIGN_OF_FLOAT   4
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#define PR_ALIGN_OF_DOUBLE  8
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#define PR_ALIGN_OF_POINTER 8
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#define PR_ALIGN_OF_WORD    8
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#define PR_BYTES_PER_WORD_LOG2   3
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#define PR_BYTES_PER_DWORD_LOG2  3
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#elif defined(__powerpc__)
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#undef  IS_LITTLE_ENDIAN
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#define IS_BIG_ENDIAN    1
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#define PR_BYTES_PER_BYTE   1
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#define PR_BYTES_PER_SHORT  2
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#define PR_BYTES_PER_INT    4
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#define PR_BYTES_PER_INT64  8
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#define PR_BYTES_PER_LONG   4
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#define PR_BYTES_PER_FLOAT  4
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#define PR_BYTES_PER_DOUBLE 8
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#define PR_BYTES_PER_WORD   4
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#define PR_BYTES_PER_DWORD  8
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#define PR_BITS_PER_BYTE    8
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#define PR_BITS_PER_SHORT   16
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#define PR_BITS_PER_INT     32
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#define PR_BITS_PER_INT64   64
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#define PR_BITS_PER_LONG    32
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#define PR_BITS_PER_FLOAT   32
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#define PR_BITS_PER_DOUBLE  64
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#define PR_BITS_PER_WORD    32
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#define PR_BITS_PER_BYTE_LOG2   3
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#define PR_BITS_PER_SHORT_LOG2  4
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#define PR_BITS_PER_INT_LOG2    5
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#define PR_BITS_PER_INT64_LOG2  6
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#define PR_BITS_PER_LONG_LOG2   5
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#define PR_BITS_PER_FLOAT_LOG2  5
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#define PR_BITS_PER_DOUBLE_LOG2 6
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#define PR_BITS_PER_WORD_LOG2   5
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#define PR_ALIGN_OF_SHORT   2
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#define PR_ALIGN_OF_INT     4
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#define PR_ALIGN_OF_LONG    4
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#define PR_ALIGN_OF_INT64   8
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#define PR_ALIGN_OF_FLOAT   4
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#define PR_ALIGN_OF_DOUBLE  8
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#define PR_ALIGN_OF_POINTER 4
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#define PR_ALIGN_OF_WORD    4
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#define PR_BYTES_PER_WORD_LOG2   2
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#define PR_BYTES_PER_DWORD_LOG2  3
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#elif defined(__alpha)
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#define IS_LITTLE_ENDIAN 1
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#undef  IS_BIG_ENDIAN
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#define IS_64
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#define PR_BYTES_PER_BYTE   1
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#define PR_BYTES_PER_SHORT  2
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#define PR_BYTES_PER_INT    4
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#define PR_BYTES_PER_INT64  8
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#define PR_BYTES_PER_LONG   8
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#define PR_BYTES_PER_FLOAT  4
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#define PR_BYTES_PER_DOUBLE 8
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#define PR_BYTES_PER_WORD   8
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#define PR_BYTES_PER_DWORD  8
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#define PR_BITS_PER_BYTE    8
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#define PR_BITS_PER_SHORT   16
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#define PR_BITS_PER_INT     32
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#define PR_BITS_PER_INT64   64
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#define PR_BITS_PER_LONG    64
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#define PR_BITS_PER_FLOAT   32
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#define PR_BITS_PER_DOUBLE  64
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#define PR_BITS_PER_WORD    64
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#define PR_BITS_PER_BYTE_LOG2   3
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#define PR_BITS_PER_SHORT_LOG2  4
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#define PR_BITS_PER_INT_LOG2    5
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#define PR_BITS_PER_INT64_LOG2  6
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#define PR_BITS_PER_LONG_LOG2   6
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#define PR_BITS_PER_FLOAT_LOG2  5
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#define PR_BITS_PER_DOUBLE_LOG2 6
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#define PR_BITS_PER_WORD_LOG2   6
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#define PR_ALIGN_OF_SHORT   2
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#define PR_ALIGN_OF_INT     4
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#define PR_ALIGN_OF_LONG    8
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#define PR_ALIGN_OF_INT64   8
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#define PR_ALIGN_OF_FLOAT   4
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#define PR_ALIGN_OF_DOUBLE  8
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#define PR_ALIGN_OF_POINTER 8
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#define PR_ALIGN_OF_WORD    8
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#define PR_BYTES_PER_WORD_LOG2  3
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#define PR_BYTES_PER_DWORD_LOG2 3
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#elif defined(__ia64__)
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#define IS_LITTLE_ENDIAN 1
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#undef  IS_BIG_ENDIAN
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#define IS_64
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#define PR_BYTES_PER_BYTE   1
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#define PR_BYTES_PER_SHORT  2
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#define PR_BYTES_PER_INT    4
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#define PR_BYTES_PER_INT64  8
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#define PR_BYTES_PER_LONG   8
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#define PR_BYTES_PER_FLOAT  4
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#define PR_BYTES_PER_DOUBLE 8
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#define PR_BYTES_PER_WORD   8
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#define PR_BYTES_PER_DWORD  8
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#define PR_BITS_PER_BYTE    8
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#define PR_BITS_PER_SHORT   16
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#define PR_BITS_PER_INT     32
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#define PR_BITS_PER_INT64   64
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#define PR_BITS_PER_LONG    64
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#define PR_BITS_PER_FLOAT   32
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#define PR_BITS_PER_DOUBLE  64
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#define PR_BITS_PER_WORD    64
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#define PR_BITS_PER_BYTE_LOG2   3
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#define PR_BITS_PER_SHORT_LOG2  4
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#define PR_BITS_PER_INT_LOG2    5
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#define PR_BITS_PER_INT64_LOG2  6
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#define PR_BITS_PER_LONG_LOG2   6
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#define PR_BITS_PER_FLOAT_LOG2  5
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#define PR_BITS_PER_DOUBLE_LOG2 6
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#define PR_BITS_PER_WORD_LOG2   6
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#define PR_ALIGN_OF_SHORT   2
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#define PR_ALIGN_OF_INT     4
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#define PR_ALIGN_OF_LONG    8
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#define PR_ALIGN_OF_INT64   8
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#define PR_ALIGN_OF_FLOAT   4
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#define PR_ALIGN_OF_DOUBLE  8
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#define PR_ALIGN_OF_POINTER 8
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#define PR_ALIGN_OF_WORD    8
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#define PR_BYTES_PER_WORD_LOG2  3
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#define PR_BYTES_PER_DWORD_LOG2 3
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#elif defined(__x86_64__)
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#define IS_LITTLE_ENDIAN 1
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#undef  IS_BIG_ENDIAN
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#define IS_64
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#define PR_BYTES_PER_BYTE   1
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#define PR_BYTES_PER_SHORT  2
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#define PR_BYTES_PER_INT    4
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#define PR_BYTES_PER_INT64  8
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#define PR_BYTES_PER_LONG   8
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#define PR_BYTES_PER_FLOAT  4
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#define PR_BYTES_PER_DOUBLE 8
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#define PR_BYTES_PER_WORD   8
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#define PR_BYTES_PER_DWORD  8
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#define PR_BITS_PER_BYTE    8
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#define PR_BITS_PER_SHORT   16
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#define PR_BITS_PER_INT     32
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#define PR_BITS_PER_INT64   64
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#define PR_BITS_PER_LONG    64
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#define PR_BITS_PER_FLOAT   32
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#define PR_BITS_PER_DOUBLE  64
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#define PR_BITS_PER_WORD    64
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#define PR_BITS_PER_BYTE_LOG2   3
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#define PR_BITS_PER_SHORT_LOG2  4
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#define PR_BITS_PER_INT_LOG2    5
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#define PR_BITS_PER_INT64_LOG2  6
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#define PR_BITS_PER_LONG_LOG2   6
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#define PR_BITS_PER_FLOAT_LOG2  5
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#define PR_BITS_PER_DOUBLE_LOG2 6
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#define PR_BITS_PER_WORD_LOG2   6
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#define PR_ALIGN_OF_SHORT   2
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#define PR_ALIGN_OF_INT     4
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#define PR_ALIGN_OF_LONG    8
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#define PR_ALIGN_OF_INT64   8
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#define PR_ALIGN_OF_FLOAT   4
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#define PR_ALIGN_OF_DOUBLE  8
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#define PR_ALIGN_OF_POINTER 8
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#define PR_ALIGN_OF_WORD    8
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#define PR_BYTES_PER_WORD_LOG2  3
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#define PR_BYTES_PER_DWORD_LOG2 3
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#elif defined(__mc68000__)
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#undef  IS_LITTLE_ENDIAN
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#define IS_BIG_ENDIAN 1
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#define PR_BYTES_PER_BYTE   1
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#define PR_BYTES_PER_SHORT  2
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#define PR_BYTES_PER_INT    4
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#define PR_BYTES_PER_INT64  8
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#define PR_BYTES_PER_LONG   4
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#define PR_BYTES_PER_FLOAT  4
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#define PR_BYTES_PER_DOUBLE 8
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#define PR_BYTES_PER_WORD   4
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#define PR_BYTES_PER_DWORD  8
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#define PR_BITS_PER_BYTE    8
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#define PR_BITS_PER_SHORT   16
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#define PR_BITS_PER_INT     32
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#define PR_BITS_PER_INT64   64
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#define PR_BITS_PER_LONG    32
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#define PR_BITS_PER_FLOAT   32
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#define PR_BITS_PER_DOUBLE  64
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#define PR_BITS_PER_WORD    32
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#define PR_BITS_PER_BYTE_LOG2   3
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#define PR_BITS_PER_SHORT_LOG2  4
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#define PR_BITS_PER_INT_LOG2    5
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#define PR_BITS_PER_INT64_LOG2  6
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#define PR_BITS_PER_LONG_LOG2   5
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#define PR_BITS_PER_FLOAT_LOG2  5
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#define PR_BITS_PER_DOUBLE_LOG2 6
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#define PR_BITS_PER_WORD_LOG2   5
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#define PR_ALIGN_OF_SHORT   2
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#define PR_ALIGN_OF_INT     2
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#define PR_ALIGN_OF_LONG    2
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#define PR_ALIGN_OF_INT64   2
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#define PR_ALIGN_OF_FLOAT   2
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#define PR_ALIGN_OF_DOUBLE  2
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#define PR_ALIGN_OF_POINTER 2
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#define PR_ALIGN_OF_WORD    2
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#define PR_BYTES_PER_WORD_LOG2   2
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#define PR_BYTES_PER_DWORD_LOG2  3
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#elif defined(__sparc__) && defined (__arch64__)
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#undef	IS_LITTLE_ENDIAN
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#define	IS_BIG_ENDIAN 1
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#define IS_64
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#define PR_BYTES_PER_BYTE   1
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#define PR_BYTES_PER_SHORT  2
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#define PR_BYTES_PER_INT    4
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#define PR_BYTES_PER_INT64  8
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#define PR_BYTES_PER_LONG   8
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#define PR_BYTES_PER_FLOAT  4
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#define PR_BYTES_PER_DOUBLE 8
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#define PR_BYTES_PER_WORD   8
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#define PR_BYTES_PER_DWORD  8
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#define PR_BITS_PER_BYTE    8
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#define PR_BITS_PER_SHORT   16
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#define PR_BITS_PER_INT     32
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#define PR_BITS_PER_INT64   64
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#define PR_BITS_PER_LONG    64
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#define PR_BITS_PER_FLOAT   32
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#define PR_BITS_PER_DOUBLE  64
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#define PR_BITS_PER_WORD    64
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#define PR_BITS_PER_BYTE_LOG2   3
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#define PR_BITS_PER_SHORT_LOG2  4
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#define PR_BITS_PER_INT_LOG2    5
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parents:
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   362
#define PR_BITS_PER_INT64_LOG2  6
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parents:
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   363
#define PR_BITS_PER_LONG_LOG2   6
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parents:
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   364
#define PR_BITS_PER_FLOAT_LOG2  5
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parents:
diff changeset
   365
#define PR_BITS_PER_DOUBLE_LOG2 6
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   366
#define PR_BITS_PER_WORD_LOG2   6
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   367
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   368
#define PR_ALIGN_OF_SHORT   2
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   369
#define PR_ALIGN_OF_INT     4
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   370
#define PR_ALIGN_OF_INT64   8
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parents:
diff changeset
   371
#define PR_ALIGN_OF_LONG    8
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parents:
diff changeset
   372
#define PR_ALIGN_OF_FLOAT   4
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parents:
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   373
#define PR_ALIGN_OF_DOUBLE  8
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parents:
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   374
#define PR_ALIGN_OF_POINTER 8
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   375
#define PR_ALIGN_OF_WORD    8
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parents:
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   376
e4e5f02787a1 Front IDILL :
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   377
#define PR_BYTES_PER_WORD_LOG2   3
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   378
#define PR_BYTES_PER_DWORD_LOG2  3
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   379
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parents:
diff changeset
   380
#elif defined(__sparc__)
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   381
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   382
#undef	IS_LITTLE_ENDIAN
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   383
#define	IS_BIG_ENDIAN 1
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diff changeset
   384
e4e5f02787a1 Front IDILL :
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   385
#define PR_BYTES_PER_BYTE   1
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bastiena
parents:
diff changeset
   386
#define PR_BYTES_PER_SHORT  2
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parents:
diff changeset
   387
#define PR_BYTES_PER_INT    4
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   388
#define PR_BYTES_PER_INT64  8
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parents:
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   389
#define PR_BYTES_PER_LONG   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   390
#define PR_BYTES_PER_FLOAT  4
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   391
#define PR_BYTES_PER_DOUBLE 8
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parents:
diff changeset
   392
#define PR_BYTES_PER_WORD   4
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parents:
diff changeset
   393
#define PR_BYTES_PER_DWORD  8
e4e5f02787a1 Front IDILL :
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parents:
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   394
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   395
#define PR_BITS_PER_BYTE    8
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parents:
diff changeset
   396
#define PR_BITS_PER_SHORT   16
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   397
#define PR_BITS_PER_INT     32
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   398
#define PR_BITS_PER_INT64   64
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bastiena
parents:
diff changeset
   399
#define PR_BITS_PER_LONG    32
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bastiena
parents:
diff changeset
   400
#define PR_BITS_PER_FLOAT   32
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   401
#define PR_BITS_PER_DOUBLE  64
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   402
#define PR_BITS_PER_WORD    32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   403
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   404
#define PR_BITS_PER_BYTE_LOG2   3
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   405
#define PR_BITS_PER_SHORT_LOG2  4
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   406
#define PR_BITS_PER_INT_LOG2    5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   407
#define PR_BITS_PER_INT64_LOG2  6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   408
#define PR_BITS_PER_LONG_LOG2   5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   409
#define PR_BITS_PER_FLOAT_LOG2  5
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parents:
diff changeset
   410
#define PR_BITS_PER_DOUBLE_LOG2 6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   411
#define PR_BITS_PER_WORD_LOG2   5
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   412
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   413
#define PR_ALIGN_OF_SHORT   2
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parents:
diff changeset
   414
#define PR_ALIGN_OF_INT     4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   415
#define PR_ALIGN_OF_LONG    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   416
#define PR_ALIGN_OF_INT64   8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   417
#define PR_ALIGN_OF_FLOAT   4
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   418
#define PR_ALIGN_OF_DOUBLE  8
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bastiena
parents:
diff changeset
   419
#define PR_ALIGN_OF_POINTER 4
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   420
#define PR_ALIGN_OF_WORD    4
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   421
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   422
#define PR_BYTES_PER_WORD_LOG2   2
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parents:
diff changeset
   423
#define PR_BYTES_PER_DWORD_LOG2  3
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   424
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   425
#elif defined(__i386__)
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bastiena
parents:
diff changeset
   426
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   427
#define IS_LITTLE_ENDIAN 1
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bastiena
parents:
diff changeset
   428
#undef  IS_BIG_ENDIAN
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bastiena
parents:
diff changeset
   429
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   430
#define PR_BYTES_PER_BYTE   1
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   431
#define PR_BYTES_PER_SHORT  2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   432
#define PR_BYTES_PER_INT    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   433
#define PR_BYTES_PER_INT64  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   434
#define PR_BYTES_PER_LONG   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   435
#define PR_BYTES_PER_FLOAT  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   436
#define PR_BYTES_PER_DOUBLE 8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   437
#define PR_BYTES_PER_WORD   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   438
#define PR_BYTES_PER_DWORD  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   439
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   440
#define PR_BITS_PER_BYTE    8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   441
#define PR_BITS_PER_SHORT   16
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   442
#define PR_BITS_PER_INT     32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   443
#define PR_BITS_PER_INT64   64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   444
#define PR_BITS_PER_LONG    32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   445
#define PR_BITS_PER_FLOAT   32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   446
#define PR_BITS_PER_DOUBLE  64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   447
#define PR_BITS_PER_WORD    32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   448
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   449
#define PR_BITS_PER_BYTE_LOG2   3
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   450
#define PR_BITS_PER_SHORT_LOG2  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   451
#define PR_BITS_PER_INT_LOG2    5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   452
#define PR_BITS_PER_INT64_LOG2  6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   453
#define PR_BITS_PER_LONG_LOG2   5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   454
#define PR_BITS_PER_FLOAT_LOG2  5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   455
#define PR_BITS_PER_DOUBLE_LOG2 6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   456
#define PR_BITS_PER_WORD_LOG2   5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   457
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   458
#define PR_ALIGN_OF_SHORT   2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   459
#define PR_ALIGN_OF_INT     4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   460
#define PR_ALIGN_OF_LONG    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   461
#define PR_ALIGN_OF_INT64   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   462
#define PR_ALIGN_OF_FLOAT   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   463
#define PR_ALIGN_OF_DOUBLE  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   464
#define PR_ALIGN_OF_POINTER 4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   465
#define PR_ALIGN_OF_WORD    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   466
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   467
#define PR_BYTES_PER_WORD_LOG2   2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   468
#define PR_BYTES_PER_DWORD_LOG2  3
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   469
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   470
#elif defined(__mips__)
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   471
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   472
#ifdef __MIPSEB__
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   473
#define IS_BIG_ENDIAN 1
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   474
#undef  IS_LITTLE_ENDIAN
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   475
#elif defined(__MIPSEL__)
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   476
#define IS_LITTLE_ENDIAN 1
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   477
#undef  IS_BIG_ENDIAN
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   478
#else
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   479
#error "Unknown MIPS endianness."
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   480
#endif
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   481
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   482
#define PR_BYTES_PER_BYTE   1
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   483
#define PR_BYTES_PER_SHORT  2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   484
#define PR_BYTES_PER_INT    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   485
#define PR_BYTES_PER_INT64  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   486
#define PR_BYTES_PER_LONG   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   487
#define PR_BYTES_PER_FLOAT  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   488
#define PR_BYTES_PER_DOUBLE 8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   489
#define PR_BYTES_PER_WORD   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   490
#define PR_BYTES_PER_DWORD  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   491
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   492
#define PR_BITS_PER_BYTE    8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   493
#define PR_BITS_PER_SHORT   16
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   494
#define PR_BITS_PER_INT     32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   495
#define PR_BITS_PER_INT64   64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   496
#define PR_BITS_PER_LONG    32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   497
#define PR_BITS_PER_FLOAT   32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   498
#define PR_BITS_PER_DOUBLE  64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   499
#define PR_BITS_PER_WORD    32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   500
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   501
#define PR_BITS_PER_BYTE_LOG2   3
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   502
#define PR_BITS_PER_SHORT_LOG2  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   503
#define PR_BITS_PER_INT_LOG2    5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   504
#define PR_BITS_PER_INT64_LOG2  6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   505
#define PR_BITS_PER_LONG_LOG2   5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   506
#define PR_BITS_PER_FLOAT_LOG2  5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   507
#define PR_BITS_PER_DOUBLE_LOG2 6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   508
#define PR_BITS_PER_WORD_LOG2   5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   509
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   510
#define PR_ALIGN_OF_SHORT   2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   511
#define PR_ALIGN_OF_INT     4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   512
#define PR_ALIGN_OF_LONG    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   513
#define PR_ALIGN_OF_INT64   8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   514
#define PR_ALIGN_OF_FLOAT   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   515
#define PR_ALIGN_OF_DOUBLE  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   516
#define PR_ALIGN_OF_POINTER 4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   517
#define PR_ALIGN_OF_WORD    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   518
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   519
#define PR_BYTES_PER_WORD_LOG2   2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   520
#define PR_BYTES_PER_DWORD_LOG2  3
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   521
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   522
#elif defined(__arm__)
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   523
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   524
#define IS_LITTLE_ENDIAN 1
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   525
#undef  IS_BIG_ENDIAN
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   526
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   527
#define PR_BYTES_PER_BYTE   1
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   528
#define PR_BYTES_PER_SHORT  2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   529
#define PR_BYTES_PER_INT    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   530
#define PR_BYTES_PER_INT64  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   531
#define PR_BYTES_PER_LONG   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   532
#define PR_BYTES_PER_FLOAT  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   533
#define PR_BYTES_PER_DOUBLE 8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   534
#define PR_BYTES_PER_WORD   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   535
#define PR_BYTES_PER_DWORD  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   536
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   537
#define PR_BITS_PER_BYTE    8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   538
#define PR_BITS_PER_SHORT   16
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   539
#define PR_BITS_PER_INT     32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   540
#define PR_BITS_PER_INT64   64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   541
#define PR_BITS_PER_LONG    32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   542
#define PR_BITS_PER_FLOAT   32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   543
#define PR_BITS_PER_DOUBLE  64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   544
#define PR_BITS_PER_WORD    32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   545
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   546
#define PR_BITS_PER_BYTE_LOG2   3
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   547
#define PR_BITS_PER_SHORT_LOG2  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   548
#define PR_BITS_PER_INT_LOG2    5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   549
#define PR_BITS_PER_INT64_LOG2  6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   550
#define PR_BITS_PER_LONG_LOG2   5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   551
#define PR_BITS_PER_FLOAT_LOG2  5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   552
#define PR_BITS_PER_DOUBLE_LOG2 6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   553
#define PR_BITS_PER_WORD_LOG2   5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   554
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   555
#define PR_ALIGN_OF_SHORT   2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   556
#define PR_ALIGN_OF_INT     4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   557
#define PR_ALIGN_OF_LONG    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   558
#define PR_ALIGN_OF_INT64   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   559
#define PR_ALIGN_OF_FLOAT   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   560
#define PR_ALIGN_OF_DOUBLE  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   561
#define PR_ALIGN_OF_POINTER 4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   562
#define PR_ALIGN_OF_WORD    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   563
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   564
#define PR_BYTES_PER_WORD_LOG2   2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   565
#define PR_BYTES_PER_DWORD_LOG2  3
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   566
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   567
#elif defined(__hppa__)
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   568
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   569
#undef  IS_LITTLE_ENDIAN
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   570
#define IS_BIG_ENDIAN    1
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   571
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   572
#define PR_BYTES_PER_BYTE   1
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   573
#define PR_BYTES_PER_SHORT  2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   574
#define PR_BYTES_PER_INT    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   575
#define PR_BYTES_PER_INT64  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   576
#define PR_BYTES_PER_LONG   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   577
#define PR_BYTES_PER_FLOAT  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   578
#define PR_BYTES_PER_DOUBLE 8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   579
#define PR_BYTES_PER_WORD   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   580
#define PR_BYTES_PER_DWORD  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   581
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   582
#define PR_BITS_PER_BYTE    8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   583
#define PR_BITS_PER_SHORT   16
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   584
#define PR_BITS_PER_INT     32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   585
#define PR_BITS_PER_INT64   64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   586
#define PR_BITS_PER_LONG    32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   587
#define PR_BITS_PER_FLOAT   32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   588
#define PR_BITS_PER_DOUBLE  64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   589
#define PR_BITS_PER_WORD    32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   590
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   591
#define PR_BITS_PER_BYTE_LOG2   3
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   592
#define PR_BITS_PER_SHORT_LOG2  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   593
#define PR_BITS_PER_INT_LOG2    5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   594
#define PR_BITS_PER_INT64_LOG2  6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   595
#define PR_BITS_PER_LONG_LOG2   5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   596
#define PR_BITS_PER_FLOAT_LOG2  5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   597
#define PR_BITS_PER_DOUBLE_LOG2 6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   598
#define PR_BITS_PER_WORD_LOG2   5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   599
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   600
#define PR_ALIGN_OF_SHORT   2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   601
#define PR_ALIGN_OF_INT     4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   602
#define PR_ALIGN_OF_LONG    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   603
#define PR_ALIGN_OF_INT64   8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   604
#define PR_ALIGN_OF_FLOAT   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   605
#define PR_ALIGN_OF_DOUBLE  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   606
#define PR_ALIGN_OF_POINTER 4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   607
#define PR_ALIGN_OF_WORD    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   608
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   609
#define PR_BYTES_PER_WORD_LOG2   2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   610
#define PR_BYTES_PER_DWORD_LOG2  3
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   611
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   612
#elif defined(__s390x__)
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   613
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   614
#define IS_BIG_ENDIAN 1
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   615
#undef  IS_LITTLE_ENDIAN
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   616
#define IS_64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   617
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   618
#define PR_BYTES_PER_BYTE   1
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   619
#define PR_BYTES_PER_SHORT  2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   620
#define PR_BYTES_PER_INT    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   621
#define PR_BYTES_PER_INT64  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   622
#define PR_BYTES_PER_LONG   8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   623
#define PR_BYTES_PER_FLOAT  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   624
#define PR_BYTES_PER_DOUBLE 8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   625
#define PR_BYTES_PER_WORD   8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   626
#define PR_BYTES_PER_DWORD  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   627
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   628
#define PR_BITS_PER_BYTE    8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   629
#define PR_BITS_PER_SHORT   16
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   630
#define PR_BITS_PER_INT     32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   631
#define PR_BITS_PER_INT64   64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   632
#define PR_BITS_PER_LONG    64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   633
#define PR_BITS_PER_FLOAT   32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   634
#define PR_BITS_PER_DOUBLE  64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   635
#define PR_BITS_PER_WORD    64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   636
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   637
#define PR_BITS_PER_BYTE_LOG2   3
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   638
#define PR_BITS_PER_SHORT_LOG2  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   639
#define PR_BITS_PER_INT_LOG2    5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   640
#define PR_BITS_PER_INT64_LOG2  6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   641
#define PR_BITS_PER_LONG_LOG2   6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   642
#define PR_BITS_PER_FLOAT_LOG2  5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   643
#define PR_BITS_PER_DOUBLE_LOG2 6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   644
#define PR_BITS_PER_WORD_LOG2   6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   645
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   646
#define PR_ALIGN_OF_SHORT   2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   647
#define PR_ALIGN_OF_INT     4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   648
#define PR_ALIGN_OF_LONG    8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   649
#define PR_ALIGN_OF_INT64   8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   650
#define PR_ALIGN_OF_FLOAT   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   651
#define PR_ALIGN_OF_DOUBLE  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   652
#define PR_ALIGN_OF_POINTER 8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   653
#define PR_ALIGN_OF_WORD    8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   654
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   655
#define PR_BYTES_PER_WORD_LOG2   3
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   656
#define PR_BYTES_PER_DWORD_LOG2  3
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   657
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   658
#elif defined(__s390__)
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   659
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   660
#define IS_BIG_ENDIAN 1
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   661
#undef  IS_LITTLE_ENDIAN
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   662
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   663
#define PR_BYTES_PER_BYTE   1
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   664
#define PR_BYTES_PER_SHORT  2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   665
#define PR_BYTES_PER_INT    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   666
#define PR_BYTES_PER_INT64  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   667
#define PR_BYTES_PER_LONG   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   668
#define PR_BYTES_PER_FLOAT  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   669
#define PR_BYTES_PER_DOUBLE 8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   670
#define PR_BYTES_PER_WORD   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   671
#define PR_BYTES_PER_DWORD  8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   672
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   673
#define PR_BITS_PER_BYTE    8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   674
#define PR_BITS_PER_SHORT   16
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   675
#define PR_BITS_PER_INT     32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   676
#define PR_BITS_PER_INT64   64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   677
#define PR_BITS_PER_LONG    32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   678
#define PR_BITS_PER_FLOAT   32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   679
#define PR_BITS_PER_DOUBLE  64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   680
#define PR_BITS_PER_WORD    32
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   681
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   682
#define PR_BITS_PER_BYTE_LOG2   3
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   683
#define PR_BITS_PER_SHORT_LOG2  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   684
#define PR_BITS_PER_INT_LOG2    5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   685
#define PR_BITS_PER_INT64_LOG2  6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   686
#define PR_BITS_PER_LONG_LOG2   5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   687
#define PR_BITS_PER_FLOAT_LOG2  5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   688
#define PR_BITS_PER_DOUBLE_LOG2 6
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   689
#define PR_BITS_PER_WORD_LOG2   5
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   690
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   691
#define PR_ALIGN_OF_SHORT   2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   692
#define PR_ALIGN_OF_INT     4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   693
#define PR_ALIGN_OF_LONG    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   694
#define PR_ALIGN_OF_INT64   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   695
#define PR_ALIGN_OF_FLOAT   4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   696
#define PR_ALIGN_OF_DOUBLE  4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   697
#define PR_ALIGN_OF_POINTER 4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   698
#define PR_ALIGN_OF_WORD    4
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   699
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   700
#define PR_BYTES_PER_WORD_LOG2   2
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   701
#define PR_BYTES_PER_DWORD_LOG2  3
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   702
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   703
#else
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   704
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   705
#error "Unknown CPU architecture"
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   706
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   707
#endif
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   708
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   709
#ifndef HAVE_LONG_LONG
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   710
#define	HAVE_LONG_LONG
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   711
#endif
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   712
#if PR_ALIGN_OF_DOUBLE == 8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   713
#define HAVE_ALIGNED_DOUBLES
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   714
#endif
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   715
#if PR_ALIGN_OF_INT64 == 8
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   716
#define HAVE_ALIGNED_LONGLONGS
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   717
#endif
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   718
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   719
#ifndef NO_NSPR_10_SUPPORT
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   720
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   721
#define BYTES_PER_BYTE		PR_BYTES_PER_BYTE
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   722
#define BYTES_PER_SHORT 	PR_BYTES_PER_SHORT
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   723
#define BYTES_PER_INT 		PR_BYTES_PER_INT
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   724
#define BYTES_PER_INT64		PR_BYTES_PER_INT64
e4e5f02787a1 Front IDILL :
bastiena
parents:
diff changeset
   725
#define BYTES_PER_LONG		PR_BYTES_PER_LONG
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parents:
diff changeset
   726
#define BYTES_PER_FLOAT		PR_BYTES_PER_FLOAT
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parents:
diff changeset
   727
#define BYTES_PER_DOUBLE	PR_BYTES_PER_DOUBLE
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parents:
diff changeset
   728
#define BYTES_PER_WORD		PR_BYTES_PER_WORD
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parents:
diff changeset
   729
#define BYTES_PER_DWORD		PR_BYTES_PER_DWORD
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parents:
diff changeset
   730
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   731
#define BITS_PER_BYTE		PR_BITS_PER_BYTE
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parents:
diff changeset
   732
#define BITS_PER_SHORT		PR_BITS_PER_SHORT
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parents:
diff changeset
   733
#define BITS_PER_INT		PR_BITS_PER_INT
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parents:
diff changeset
   734
#define BITS_PER_INT64		PR_BITS_PER_INT64
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parents:
diff changeset
   735
#define BITS_PER_LONG		PR_BITS_PER_LONG
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parents:
diff changeset
   736
#define BITS_PER_FLOAT		PR_BITS_PER_FLOAT
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parents:
diff changeset
   737
#define BITS_PER_DOUBLE		PR_BITS_PER_DOUBLE
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parents:
diff changeset
   738
#define BITS_PER_WORD		PR_BITS_PER_WORD
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parents:
diff changeset
   739
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parents:
diff changeset
   740
#define BITS_PER_BYTE_LOG2	PR_BITS_PER_BYTE_LOG2
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parents:
diff changeset
   741
#define BITS_PER_SHORT_LOG2	PR_BITS_PER_SHORT_LOG2
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parents:
diff changeset
   742
#define BITS_PER_INT_LOG2	PR_BITS_PER_INT_LOG2
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parents:
diff changeset
   743
#define BITS_PER_INT64_LOG2	PR_BITS_PER_INT64_LOG2
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parents:
diff changeset
   744
#define BITS_PER_LONG_LOG2	PR_BITS_PER_LONG_LOG2
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parents:
diff changeset
   745
#define BITS_PER_FLOAT_LOG2	PR_BITS_PER_FLOAT_LOG2
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parents:
diff changeset
   746
#define BITS_PER_DOUBLE_LOG2 	PR_BITS_PER_DOUBLE_LOG2
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parents:
diff changeset
   747
#define BITS_PER_WORD_LOG2	PR_BITS_PER_WORD_LOG2
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parents:
diff changeset
   748
e4e5f02787a1 Front IDILL :
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parents:
diff changeset
   749
#define ALIGN_OF_SHORT		PR_ALIGN_OF_SHORT
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parents:
diff changeset
   750
#define ALIGN_OF_INT		PR_ALIGN_OF_INT
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parents:
diff changeset
   751
#define ALIGN_OF_LONG		PR_ALIGN_OF_LONG
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parents:
diff changeset
   752
#define ALIGN_OF_INT64		PR_ALIGN_OF_INT64
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parents:
diff changeset
   753
#define ALIGN_OF_FLOAT		PR_ALIGN_OF_FLOAT
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parents:
diff changeset
   754
#define ALIGN_OF_DOUBLE		PR_ALIGN_OF_DOUBLE
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parents:
diff changeset
   755
#define ALIGN_OF_POINTER	PR_ALIGN_OF_POINTER
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parents:
diff changeset
   756
#define ALIGN_OF_WORD		PR_ALIGN_OF_WORD
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parents:
diff changeset
   757
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parents:
diff changeset
   758
#define BYTES_PER_WORD_LOG2	PR_BYTES_PER_WORD_LOG2
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parents:
diff changeset
   759
#define BYTES_PER_DWORD_LOG2	PR_BYTES_PER_DWORD_LOG2
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parents:
diff changeset
   760
#define WORDS_PER_DWORD_LOG2	PR_WORDS_PER_DWORD_LOG2
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parents:
diff changeset
   761
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parents:
diff changeset
   762
#endif /* NO_NSPR_10_SUPPORT */
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parents:
diff changeset
   763
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diff changeset
   764
#endif /* nspr_cpucfg___ */